GCC Code Coverage Report


Directory: avs_core/
Coverage: low: ≥ 0% medium: ≥ 75.0% high: ≥ 90.0%
Coverage Exec / Excl / Total
Lines: 100.0% 7 / 0 / 7
Functions: -% 0 / 0 / 0
Branches: -% 0 / 0 / 0

filters/overlay/intel/masked_rowprep_avx2_impl.h
Line Branch Exec Source
1 // masked_rowprep_avx2_impl.h
2 // Internal AVX2 helper — only include from TUs compiled with AVX2 flags.
3 // Provides simd_magic_div_32_avx2 inline + the rowprep declarations.
4
5 #pragma once
6
7 #if defined(_MSC_VER)
8 #include <intrin.h>
9 #else
10 #include <immintrin.h>
11 #endif
12
13 #include "masked_rowprep_avx2.h"
14
15 // ---------------------------------------------------------------------------
16 // simd_magic_div_32_avx2
17 // Inline here: used by masked_rowprep_avx2.cpp and masked_merge_avx2_impl.hpp
18 // in inner loops where it must remain inlineable.
19 // ---------------------------------------------------------------------------
20 #if defined(GCC) || defined(CLANG)
21 __attribute__((__target__("avx2")))
22 #endif
23 static AVS_FORCEINLINE __m256i simd_magic_div_32_avx2(__m256i val, uint32_t magic, int shift) {
24 934 __m256i v_magic = _mm256_set1_epi64x(magic);
25 467 __m256i res_even = _mm256_mul_epu32(val, v_magic);
26 467 __m256i res_odd = _mm256_mul_epu32(_mm256_srli_si256(val, 4), v_magic);
27 467 res_even = _mm256_srli_epi64(res_even, 32 + shift);
28 934 res_odd = _mm256_srli_epi64(res_odd, 32 + shift);
29 467 __m256i res_odd_shifted = _mm256_slli_epi64(res_odd, 32);
30 467 return _mm256_blend_epi32(res_even, res_odd_shifted, 0xAA);
31 }
32